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Design Idea DI-117
TinySwitch-III
Application Adapters / General Purpose Device
(R)
15 W, 12 V Adapter with <100 mW No-Load Consumption
Power Output 15 W Input Voltage 90-265 VAC Output Voltage 12 V Topology Flyback
TNY279P
Design Highlights
* * * * * * * Simple, low cost, low parts count solution Low input power at no-load: <100 mW at 265 VAC High efficiency >81% at 90 VAC Meets CEC requirements for active mode efficiency (79 % vs. 73.5 % requirement) >10 dBV margin to EN55022B conducted EMI limits Simple, primary-side output overvoltage latching shutdown protects load under fault conditions Low line frequency leakage current <10 A
Operation
The TNY279 (U1) in the 8-pin DIP package selected for the flyback design in Figure 1 is ideal for adapter applications. The arrangement of the four SOURCE pins on one side of the package allows a small metal heatsink to be inserted. This allows the device to operate in a sealed adapter with an external ambient of 40 C.
L4 1 mH C5 1 nF R5 R6 1 kV 240 k 240 k
The internal MOSFET in U1 conducts current through the primary winding of T1 during each enabled switching cycle. When the primary current reaches the MOSFET current limit, the controller turns it off, and the energy in T1 is transferred to the output. Schottky diode D7 and capacitor C8 rectify and filter the output. Inductors L3 and capacitor C9 attenuate the switching ripple on the output. Capacitor C3 selects the standard current limit of U1. For higher efficiency, the next larger (TNY280P) device may be used. In this case, the value of C3 would be changed to 1 F, selecting the reduced current limit for the larger device, but no other circuit changes would be required. The primary clamp (D5, R1, C5, R5 and R6) limits the maximum peak drain voltage below the 700 V breakdown voltage of U1's internal MOSFET. Resistor R1 dampens the high-frequency ringing of the T1 leakage inductance.
C6 68 pF 250 VAC C11 R7 1 nF 100 V 20
1
T1
10 D7 SB580 C8 680 F 25 V
L3 Ferrite Bead 3.5 x 7.6 mm
C9 220 F 25 V
+12 V, 1.25 A
D1 1N4005GP F1 3.15 A 90-265 VAC
D2 1N4005 C1 10 F 400 V C2 22 F 400 V R1 100 D5 FR107
3 NC
9 5
RTN D6 1N4148 C7 1 F 50 V R8 56
4 EF20
D3 1N4005GP
D4 1N4005
L5 3.3 H
VR3 BZX79-B6V8 6.8 V R4 47 R3 10 k
EN/UV
BP/M
U2-B
TinySwitch-III U1 TNY279P
D
R9 1 k
R11 39 k 1%
R2 100 C4 33 pF 1 kV
S S
C10 220 nF 50 V U2-A PC817A U3 LM431
R10 3 k
C3 100 nF 50 V
R12 10 k 1%
PI-4417-051106
Figure 1. 15 W, 12 V Output Supply Using TNY279P.
DI-117
September 2006
DI-89 DI-117
The built-in frequency jitter and E-ShieldTM techniques allow simple EMI filtering to comply with EN55022B. Resistor R2 and C4 form an RC snubber to reduce high-frequency EMI. Output overvoltage protection (OVP) is provided on the primary side by sensing the voltage of the auxiliary transformer winding. Should the main feedback loop open due to failure of U2, then U1 will latch off once the current into the BP/M pin (via VR3) exceeds 6.5 mA. Diode D6 and capacitor C7 rectify and smooth the output of the auxiliary winding. The value of VR3 is selected to trigger the OVP latch when the main output, and hence the auxiliary output voltage, rises above the normal regulation range. Once triggered, cycling the AC power resets the OVP latch. To reduce no-load input power and thus increase light load efficiency, resistor R3 feeds the supply current for U1 from the auxiliary winding on the transformer.
PI-4415-050806
Key Design Points
* Verify maximum drain voltage is <650 V at high line, maximum overload. Adjust values of R5, R6 and C5 accordingly. However, avoid making the clamp too dissipative (low value of R5 and R6, and high value of C5) as this will increase no-load consumption. To prevent an increase in no-load consumption or false OVP triggering, VR3 should be selected to conduct only when the output voltage is outside the normal regulation range. Resistor R4 prevents excessive current from flowing into the BP/M pin. Fast recovery glass-passivated diodes were selected for D1 and D3 to reduce low frequency conducted EMI. Fast diodes such as FR107 are also suitable. TRANSFORMER PARAMETERS Core Material Bobbin Winding Details EF20, N67 or equivalent, gap for ALG of 203 nH/T2 5+5 pin horizontal Shield: 24T, 28 AWG Primary: 62T, 31 AWG Bias: 5T, 4 x 28 AWG 12 V: 7T, 23 AWG T.I.W. 3 mm tape margin, shield (1-NC), tape, primary (3-1), tape, bias (5-4), tape, 12 V (10-9), tape Primary: 790 H 7% Leakage: 30 H (max)
*
*
35 30 25
Voltage (V)
20 15 10 5 0 -5 0 50 100
Winding Order (Pin Numbers) Inductance
Time (ms)
Primary Resonant 650 kHz (min) Frequency
Table 1. Transformer Design Parameters.
T.I.W.: Triple Insulated Wire, NC: No Connection
Figure 2. Worst-Case Open Loop Output Overvoltage (85 VAC, Full Load).
For the latest updates, visit www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications illustrated herein (transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. (c)Copyright 2006, Power Integrations, Inc.
Rev. A 09/06
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